At our core, we want to change the way we live through improving the efficiency of hardware and software
The research interests of our lab are centered around the design and implementation of low-power architectures and circuits for the hardware acceleration of learning algorithms with a particular focus on neuromorphic structures. We are particularly interested in non-von Neumann architectures leveraging analog-CMOS and alternative (Beyond CMOS) computing substrates to achieve the limits of energy efficiency. We explore both hardware and software techniques to enable adaptive and learning algorithms and circuits in highly resource constrained environments such as sensors and processors used in the “Internet of Things” IOT.
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We are studying techniques that are not energy intensive to improve machine learning algorithms
Our studies develop extremely power efficient processors and circuits that can operate under severe resource constraints such as sensors and processors used in the “Internet of Things” IOT. Our group explores hardware and software techniques to enable adaptive and learning algorithms and to be implemented in low-power architectures and circuits that use machine learning algorithms to operate at the limits of energy efficiency. The use of non-von Neumann architectures and both analog-CMOS and Beyond CMOS techniques enables these designs to operate at the extremes of energy efficiency.
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We are looking for motivated graduate students and postdoctoral scholars who are interested in the general area of Computer Architecture Circuit Design and Machine Learning.
We are actively looking for motivated students who are interested in pursuing Ph.D. degrees in the topic of exploring algorithms, architectures, or circuit-level techniques to develop energy-efficient intelligent systems.
- Hardware Design for Machine Learning and Deep Neural Networks
- Reinforcement Learning
- Generative Models
- Strong coding abilities (C++ and Python)
- Deep Learning platforms (PyTorch or Tensorflow)
- VLSI Circuit Design and Computer Architecture
- CMOS Chip Tape-Out and Testing
At the Intelligent Microsystems Lab, our research traverses various levels of abstraction including systems, circuits, and algorithm design residing at the interface of machine intelligence and cyber-physical systems. We study neuromorphic and other non-von Neumann architectures where we leverage energy efficiencies in analog-CMOS and alternative (Beyond CMOS) computing structures to deliver orders of magnitude improvement in the performance of adaptive and learning systems. We work closely with groups developing new devices and materials to help us develop new chips aimed at achieving the limits of energy efficiency.
How to apply
If you are a postdoc candidate, please send us an email containing your CV, research statement, and two names for requesting reference letters.
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